ENABLE

Top  Previous  Next

Action

Enable specified interrupt.

 

 

Syntax

ENABLE interrupt [, prio]

 

 

Remarks

Interrupt

Description

INT0

External Interrupt 0

INT1

External Interrupt 1

OVF0,TIMER0, COUNTER0

TIMER0 overflow interrupt

OVF1,TIMER1,

 

COUNTER1

TIMER1 overflow interrupt

CAPTURE1, ICP1

INPUT CAPTURE TIMER1 interrupt

COMPARE1A,OC1A or

 

COMPARE1, OC1

TIMER1 OUTPUT COMPARE A interrupt

 

In case of only one compare interrupt

COMPARE1B,OC1B

TIMER1 OUTPUT COMPARE B interrupt

SPI

SPI interrupt

URXC

Serial RX complete interrupt

UDRE

Serial data register empty interrupt

UTXC

Serial TX complete interrupt

SERIAL

Disables URXC, UDRE and UTXC

ACI

Analog comparator interrupt

ADC

A/D converter interrupt



XMEGA ONLY


prio

Lo, Hi or Med.

In the Xmega you must provide the priority of the interrupts. Lo=Low priority. Hi=High priority and Med=Medium priority.

 

By default all interrupts are disabled.

To enable the enabling and disabling of interrupts use ENABLE INTERRUPTS.

 

Other chips might have additional interrupt sources such as INT2, INT3 etc.

You can find all interrupts in the DAT file. All interrupts are listed too after you type ENABLE.

 

 

 

 

See also

DISABLE , ON , CONFIG PRIORITY

 

 

Partial Example

Enable Interrupts        'allow interrupts to be set

Enable Timer1        'enables the TIMER1 interrupt